Physical Design Engineer

Job description

## About the Role We are hiring Physical Design (PD) Engineers at Adroitec Systems Pvt. Ltd. The role focuses on RTL‑to‑GDSII implementation and the end‑to‑end physical design flow for semiconductor products. Candidates should be able to take a design from synthesis through to tape‑out while ensuring timing, power, performance and area targets are met. ## Key Responsibilities - Implement physical design from RTL to GDSII, covering floorplanning, placement, CTS, routing, and timing closure. - Perform timing analysis, optimization, and congestion analysis; resolve setup/hold violations. - Conduct physical verification including DRC and LVS checks. - Optimize power, performance, and area (PPA) and evaluate IR‑Drop, EM analysis, and signal integrity. - Leverage industry‑standard EDA tools to ensure robust design implementation. ## Required Skills - Strong hands‑on experience with physical design tools such as **Synopsys ICC2** and **Fusion Compiler**. - Proficiency in floorplanning, placement, clock‑tree synthesis (CTS), routing, and timing closure. - Knowledge of RTL‑to‑GDSII flow, physical verification (DRC/LVS), and PPA optimization. - Understanding of IR‑Drop, EM analysis, and signal integrity concepts is a plus. ## Benefits - Opportunity to work on cutting‑edge semiconductor projects. - Collaborative environment with experienced engineers. - Immediate joining with a notice‑period flexibility of up to 30 days. - Competitive compensation and growth prospects.

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Compensation

Salary for this role is not disclosed by the employer. We don’t have enough benchmark data from similar roles to produce a reliable estimate. The actual compensation will be discussed during the interview process.